On the first pass, this test writes the address of each memory cell to that cell itself. On the second pass, the address is read and verified to ensure address space uniqueness.
This test makes four passes. The first writes a pattern (different for each run). The second pass reads/verifies the pattern and writes the inverse of the original pattern, repeating for the remaining two passes. This checks for adjacent bit sensitivity - a situation in which addresses other than the one being modified are affected.
Extended March C
This test uses a complex algorithm consisting of six passes through memory. It moves upwards through memory during the first three passes, writing and reading/verifying either 0s or 1s. The next two passes move downward, reading/writing 1s and 0s again (alternatively). The final pass may travel either direction, verifying that the last write was successful. This test detects address faults, coupling faults, stuck-at faults, stuck-open faults, and transition faults.
This test first writes a series of random numbers into memory. Then, on the second pass, the initial pattern is verified. Testing with random values can help locate intermittent problems. This test is also helpful in checking for neighborhood pattern sensitivity. Over multiple runs, it can help identify temperature sensitivity.
This test writes a solid bit pattern into memory, for example all 1s. The initial pattern is checked and then complemented - switched to all 0s - and checked again. This checks that all addresses are both readable and writeable.
This test moves a 101 pattern through a field of 0s. The test detects changes in adjacent cells by looking for 1s where 0s are expected.
Starting with the bit pattern 00000001, each memory cell is written and read to verify the pattern. The 1 is moved over by one address and then the test is repeated for each position. This test ensures that each bit can maintain a value opposite of its neighboring bits, known as an intra-word coupling fault. It can also find stuck address faults.
The inverse of Walking Ones. A pattern of 11111110 is the starting pattern, and the 0 is moved through memory. Useful for detecting intra-word coupling faults and stuck address faults.
Combines the Walking Ones and Zeros with an alternating 10101010 pattern. Each bit (either a 1 or a 0) is changed to its compliment as the test moves through memory, testing to ensure that the pattern isn’t broken. This test is also useful for detecting intra-word coupling faults and stuck address faults.
This test is similar to the Walking Ones and Zeros tests. It moves an exhaustive series of patterns through a field of either 1s or 0s. In addition to locating intra-word coupling faults, it is also useful for detecting if RAM is susceptible to neighborhood pattern sensitivity.
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